Attenuation - Oscilloscope Front End

Question

I have been reading up a lot on how oscilloscopes work and how to best attenuate signals and figured the best way to learn is to create my own simple oscilloscope. My design goals are quite modest compared to an actual product but I aim for accuracy and quality as well as understanding.

Design criteria:
DC - 1MHz bandwidth
1Mohm and <= 25pF input impedance
Settings electronically controlled
+/- 10% variance from input Z (Less is better but absolutely no more!)

I have read quite a few pages online as well as books. This Question was handy and basics like probe internals are good to know but the actual act of design is a daunting task.

I have selected Omron relays High End / Low End as they have great ratings and are somewhat reasonable in price. These will select AC/DC input and choose between the attenuation levels. I chose double throw relays as I will put the attenuation network in series so the fail safe mode is max attenuation and you will opt out attenuation networks by powering a relay and completely isolating the attenuator branch. (DPST on each side of the filter).

The main issue I am having is that I can not get a remotely stable input Z across DC - 1MHz, in fact I have 80.6% variance at some freq which make my setup useless. I have considered using a JFET input buffer instead of Diodes for input voltage protection but even before the protection stage my Z is all over the place.

Can anybody give me a crash course or some pointers on how the heck you attain a stable input impedance across frequencies??

Answer 1

Your high end relay seems overkill to me if your bandwidth is only to 1MHz. Have a look at (shielded) reed relays. Will be cheaper too.

1MHz is not a very high frequency, and neither is 1M\$\Omega\$ an extremely high value, so I'm a bit surprised to read that your Z is "all over the place". The JFET input buffer is a good idea. It will give you a very high input impedance; input offset current for a common TL081 is less than 200pA, so can control the impedance and scaling easily with resistor dividers.
Keep traces short and not too close to adjacent traces. For the input protection I would use low leakage diodes to clamp the input voltage between the rails.
If this doesn't help, explain in more detail what "all over the place" means, exactly.

Answer 2

Firstly you should make the input 1Mohm at DC sicne all probe up to 500MHz will be designed to work in x10 mode with a 1Mohm input. As far as resistance goes, you will always have some stray capacitance in the attenators/relays/PCB and the input capacitacne of the amplifier itself. Even 15pF (which is quite low for a scope) will give you ~10k @ 1MHz. The whole reason scope probes have the compensation circuit is to conpensate for the input capacitance of a scope input.

You want to use a Fet amp otherwise the bias current through the 1Mohm will cause very bad offset voltage. Analoge deveices do a range of nice 'Fast FET' opamp that will do the job nicely.

With ragard to clamping diodes, they are a bad idea! The amp will have internal ESD diodes so all you need to do is put a decent size resistor (~100k) in series with the input (after the 1Mohm so as not to make a potential divider) to limit current. You can bypass the 100k with a small cap if it makes a significantly low frequency pole with the input capacitance of the op amp. For the case of 1MHz I doubt it.

I would suggest making sure that all ground is cut out below any opamp signal pins and input circutiry to reduce stray capacitance.

Hope that helps

Answer 3

Just to amplify - Most oscilloscope inputs have an impedance something like 1M // 20 pF. This necessarily means the impedance varies from 1 M at DC to 7.9kohm at 1MHz and 79 ohm at 100 MHz. All electrical wires have stray capacitance, and as soon as there are any resistive impedances, you will be building RC filters. So all oscilloscope front ends use capacitive dividers in parallel with resistive dividers with a crossover from resistive to capacitive in the 10-30 kHz range.

In addition, but no less important, is the thermal noise generated by the resistor. It is proportional to resistance, so a high value resistor will generate a lot of thermal noise. The parallel capacitive divider shorts out the high frequency noise above the crossover frequency.

Most capacitive dividers have a total input capacitance of about 20 pF to match the standard 10x probe (9M//2.2pF - the 2.2 - 20 pF series capacitors make a 10x capacitive divider). Most relays have across contact capacitance of >1 pF and contact to coil capacitance of >2pF, which are significant compared with the divider capacitance. You will need to carefully manage this capacitance at higher frequencies. As the poster above said, clamping diodes are not needed if you can keep the input current to the FET op-amp to less than 5mA. A series resistor does this well, with a bypass cap to overcome the RC made with the op-amps input capacitance. (The input capacitance and the bypass cap essentially make another capacitive divider).

Good luck with your project!