0

I was surprised to see how flipflops change output on the rising edge of clock signal

1 Answers1

8

Rising and failing edges can be detected in several ways.

One is to add an additional flip-flop which serves a a simple state machine, so that only transitions from 0 to 1 are used and transitions from 1 to 0 are ignored.

enter image description here

Here is the equivalent for a falling edge detector:

enter image description here

Another is to use a short delay line, such as three 74HCT04 inverters, which results in a pulse being generated for a rising edge, but no pulse for a falling edge. The length of the pulse is the length of the delay line.

enter image description here

And then one could use a monostable, such as a 555 or 74123, to generate a short pulse on the rising edge. (For the 555, an inverter would need to be added in front of the Trigger input, since 555 triggers on the falling edge. For a falling edge detector, no inverter is needed.)

tcrosley
  • 48,066
  • 5
  • 98
  • 162