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This question is about a circuit I want to use as a schmitt-trigger and is directly related to my previous question. I modified that and changed the output with suggestion of some users. Here is the circuit:

enter image description here (please click to view the image in bigger size)

In brief, the goal of this circuit is to sharpen the incoming pulses which will have either 12V or 24V amplitude where Vcc will be same as the pulse amplitude.

But I still have five questions regarding this circuit and wanted to open as a new question not to bother and bombard the same users with several questions.

Here are my questions:

1-) I set the hysteresis around 1V. But to do that I modified R1. Do modifying R1 requires to modify R7 and R8 as well? In simulation I get the result I want but still I wonder if there must be a relation between R1 and R7 + R8.

2-) Is R2 necessary? What could be the reason for that?

3-) Why is C1 set to 1uF but not 100nF which is the typical value?

4-) ZD1 and ZD2 forms a surge protection. Is it better to let them stay there or move them right after C2, (between C2 and the inverting input)?

5-) In some examples I see speed up capacitors across R1 and R4. Do I need them in this case and what are they needed for?

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floppy380
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  • The problem is you have no details on the noise level and the signal shape, the supply impedance & noise, & Output spec. Schmitt Triggers by definition are ratiometric on output level feedback. You can simply use a CMOS Schmitt trigger with an attenuator, unless you are more specific, as I requested. – Tony Stewart EE75 Mar 01 '17 at 00:34
  • incoming signal shape is pulse 0 to 12VDC. noise will not be greater than 1V I guess. Im just not sure about how to set the the RC filter. Max pulse input will not exceed 1kHz – floppy380 Mar 01 '17 at 00:36
  • What's wrong with a simple comparator with 10% hysteresis? For this spec, you dont need anything else. – Tony Stewart EE75 Mar 01 '17 at 00:40
  • comparator has no hysteresis and would output unwanted glitches if there is some noise on slow rising input pulse edges. wouldn't it? – floppy380 Mar 01 '17 at 00:42
  • Filters are only needed if you need to attenuate noise. So far you have > 12:1 SNR so 10:1 positive feedback should never fail, unless you have underestimated the noise. What noise is it? – Tony Stewart EE75 Mar 01 '17 at 00:44
  • i dont know if there will be noise and what kind of noise this is just for a worst case scenario. – floppy380 Mar 01 '17 at 00:45
  • do you care about edge delay? or symmetry? – Tony Stewart EE75 Mar 01 '17 at 00:47
  • i thought noise can hit after the RC filter as well thats why i set the hysteresis high. – floppy380 Mar 01 '17 at 00:47
  • i dont care about edge delay, i could set the hysteresis even higher but im not sure needed:( – floppy380 Mar 01 '17 at 00:48
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    you need to understand the noise better and how to define specs – Tony Stewart EE75 Mar 01 '17 at 00:48
  • yes but how can I know if noise doesnt exists for now but maybe it will, it is just a possibility. is my way of thinking design wrong? – floppy380 Mar 01 '17 at 00:49
  • e.g 100 ohm 0.1uF only filters <10us of noise.... what is your signal and what noise is possible? – Tony Stewart EE75 Mar 01 '17 at 00:49
  • my problem is i dont know what noise can be possible from a 12Vdc pulse device and 12Vdc power supply in an indoors environment. what do you think? what kind of noise could be in this setup? – floppy380 Mar 01 '17 at 00:50
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    Yes it's wrong , you need to test for noise then define it or define environment . We have NO idea what you are doing. – Tony Stewart EE75 Mar 01 '17 at 00:51
  • to test for noise i need to generate noise. and to genrate noise i decide what to generate. but i dont know what are the possibilites – floppy380 Mar 01 '17 at 00:52
  • Imagine when u size a fuse you have an idea about the overcurrent. but i have no idea bout the possible noise and nature of the noise. but there must be a general approach to it. – floppy380 Mar 01 '17 at 00:54
  • when we add a 100nF to Vcc pin of an IC. we already assume something right? eventhough there might not be noise. what do we assume? – floppy380 Mar 01 '17 at 00:55
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    When you share an environment, conducted or radiated, it is your responsibility to become aware what the conditions are. ; by experience or by testing to get experience. – Tony Stewart EE75 Mar 01 '17 at 01:00

3 Answers3

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Here are your answers:

1) The resistors R7 and R8 only influence the current through the LED. Changing R1 to set the hysteresis is correct and works, as you mentioned.

2) In my opinion R2 works with C1 as filter to prevent U4 from noise on the supply lines.

3) Typically you use a combination of caps, for example 4.7uF in parallel with 100nF. In your case 100nF should be sufficient or just added to the existing cap. However you should not worry to much about that. This is no high speed or high power circuit.

4) The surge protection must be placed before the caps, because caps suffer from over voltage. Thus the position in the schematic is correct.

5) A cap across R1 can prevent the circuit from oscillation. Try to add 22pF. However this not necessary. Just have a try in your simulation ;)

That's it.

auoa
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  • Regarding questions: 4-) So I basically don't have to change surge diodes' position, better where it is now? 3-) I can add 100nF in parallel with C1 to be safe? 5-) Please see this source: https://books.google.dk/books?id=K2FpuYEchakC&pg=PA65&lpg=PA65&dq=speed+p+capacitor+schmitt&source=bl&ots=cpCSI4AHAC&sig=K410nPfp3vZZHWRYVjqQwk5e9CA&hl=fo&sa=X&ved=0ahUKEwirtrWMhrTSAhWEDiwKHVZwDkYQ6AEIJjAC#v=onepage&q&f=false Is C2 stray capaciatnce. I just wonder if I add 22pF in parallel to R1, do I need to add another cap to R4 as well? Thanks in advance – floppy380 Mar 01 '17 at 00:33
  • I modified my answers ;) – auoa Mar 01 '17 at 00:40
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R7 and R8 are for wanted led brightness regardless of your Vcc.

The hysteresis depends on R1, R3, R4 and the Vcc

The bigger C1 the better - your Vcc is assumed to be noisy and R2 + C1 together reduce the affect of that noise to the tresholds of your schmitt-trigger.

I want to nove the zener diodes to the right end of R5. Think about a direct connection from 24V supply to your pulse input. The diodes in their current position would smoke or at least your +24V supply would get shorted.

C over R4 makes the hysteresis slow to affect. C over R1 can speed it Do not add those capacitors without proper simulation (=with realistic model for U4 and noise). You can get an oscillator or ruin the benefits of the hysteresis.

  • i didnt get your logic on the position of ZD1 nad ZD2? Do you mean thieir place are ok in the circuit in my question? – floppy380 Mar 01 '17 at 00:58
  • @doncarlos the zeners have no affect if the input signal peak does not exceed plusminus 15V. If your Uin is higher, the zeners try to kill it by shorting. Some resistance quarantees that the zeners win and the source of the input loses. No extra resistor is needeed if you move the zeners to the right end of R5 (=parallel with C1). At the same time get 8.2V zeners. –  Mar 01 '17 at 01:09
  • you mean between R6 and C2 right? Do you mean in current situation if the input is 24V there will be no resistor to limit current and zeners will smoke? did I get you well? – floppy380 Mar 01 '17 at 01:13
  • @doncarlos Sorry I wrote C1, I mean in parallel with C2. That's the right place. If your simulation were realistic - 12.0 volts input pulses - then the zeners were a waste. But they need some resistance to help if somebody inputs say plus or minus 17 volts. I do not see, if you had a plan to have an extra resistor at the input wire. That extra resistor is not needed if you move the position of the zeners to be in parallel with C2. If you do as I told, use 8.2 volt zeners due the voltage division in resistors R5,R6 –  Mar 01 '17 at 01:33
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And use a GROUND PLANE, or outside magnetic fields will trash the comparator.

For robust behavior in presence of rapidly changing electric fields (near switching regulators or motor/relay sparks), place the input filter cap near pin- of Comparator. Move the components shows below, in direction of the arrows, so you minimize the loop areas (Hfields) and minimize the trace areas (Efields).

schematic

simulate this circuit – Schematic created using CircuitLab

analogsystemsrf
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