Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [flipflop]

A flip-flop or latch is a circuit that has two stable states and can be used to store state information.

Flip-flop on Wikipedia

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What does it mean to "gate the clock"?

In my lecture notes I keep reading "do not gate the clock". I tried searching on the Internet, but I'm unable to find the exact meaning of this phrase.
user129048
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What is the purpose of a master-slave flip-flop?

Why is having a 2 stage flip-flop desirable? Are there advantages of having a master-slave compared to a one stage JK flip flop?
beur_x
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Understanding Flip Flops

I am trying to better understand how flip flops work. I am asked: Desing a three-bit up/down counter using T-ff. It should include a control input called Up(bar)/Down. If Up(bar)/down = 0, then the circuit should behave as an up-counter. If…
Nick
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sequential circuits; clocked SR flip-flop

I'm learning about sequential logic and am wondering about the behavior of a clocked SR flip-flop. If R=S=0, then the AND gates evaluate to 0. In that case, and if the recurrent inputs to the NOR gates are initially 0, then both evaluate to 1. But…
Matt Munson
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Flip-flop timing diagram problem

I am trying to understand the solution of this exercise from Floyd's Digital Fundamentals book. I don't understand why the Q output changes in the positive edge of the 4th pulse; shouldn't that change on the negative edge of the third?
Felipe Gorcóa
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Flip flop counters

I am studying for my digital electronics final and one of the major topics is flip flop counters. I need to know how to get the asynchronous counter to preset to 2 before counting to 10. I know how to make it reset (With some well placed NAND…
Hristos
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If a flip flop has a setup violation and goes metastable, is it guaranteed to settle to the input value when it finishes oscillating?

If I'm using modern D-Flip flops and miss the setup time (i.e. my D input changes close to the clock), the danger is that the F/F will go "metastable" and spend some time oscillating. Standard designs use 2 F/Fs as a synchronizer to get such an…
Bill Nace
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Is it mandatory to include a pulse detector in order to design an edge-triggered JK Flip Flop using logic gates?

I am trying to design a positive-edge triggered JK-Flip-Flop (using 7400 and 7410 NAND gates) on a breadboard. The circuit diagram is in the picture (I would replace all AND and NOR gates with NAND gates). However, I see that there is a…
user1637645
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Unclocked, edge-triggered version of RS flip-flop?

Is there such a thing as an edge-triggered RS flip-flop? That is, one input would, on rising edge, set the output to 1, and the other input would, on rising edge, set the output to 0. Falling edges would be ignored. I feel like this must exist, but…
Sneftel
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The intuition behind RS flip-flop

I'm struggling to wrap my mind behind the concept of RS flip-flop. For me, the diagram seems very non-intuitive. Whenever I accept, for example, that Q is HIGH and follow signal route (is it even correct to say so?) I come to a logical contradiction…
Vladislavs Burakovs
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How do I calculate period of synchronous counter?

So how do I calculate maximum frequency if this values are given: \$T_{Hold-ff}=0.2ns\$, \$T_{Delay-ff}=2ns\$, \$T_{Delay-nor}=0.3ns\$,\$T_{Delay-nand}=0.4ns\$,\$T_{Setup-ff}=0.5ns\$. I thought about:…
Alen
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Is this a flip-flop?

What does this circuit do? It looks a little bit like a flip-flop to me, but it doesn't exactly match the circuit for an SR flip-flop on Wikipedia. Is this just a different way to implement an SR flip-flop, or is it something else…
user31708
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3bit Gray counter using D Flip Flops and logic gates

I am studying a lesson about Logic Design and circuits. I have a question I can not find the answer. How can I design a 3-bit Gray counter using D flip flops? I know what the Gray code is, I know what a counter, logic gates and D flip flops do, but…
EnexoOnoma
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Using just one output of a J-K flip-flop

If I am using a J-K flip-flop, but only need one of the outputs, what should I do with the other? Leave it disconnected, or tie it high/low (via a resistor?) Why?
Richard Ev
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what is frequency divider and how does it work with d type flip flop circuit?

I am trying to learn about these things but I have very hard time to understand frequency divider and the leading edge and trailing edge of voltage. Please, help is needed if someone explain it in easy way. Or could someone route me to any good…
abdul raziq
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